BIST TOOL
Principles of Built-In Self-Test techniques
and
generation of BIST structure applications
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| * Introduction |
A software tool automatically generates built-in self-test blocks into VHDL models of digital circuits. A learning module for explaining BIST blocks applicated to a circuits is a part of the BIST tool. |
| * Method |
The built-in self-testing method needs a built-in
test generator and test result evaluation.
Self-test generators are based on a hardware realisation of pseudorandom or deterministic test sets. Test evaluation techniques use methods of compaction and signature analysis. |
| * Tool description |
The BIST tool contains two modules:
- module for learning the BIST technique principles,
- module for the BIST structure generation.
Tool intput: the VHDL entity of a circuit, tool output: the VHDL model of given circuit with self testing. |
| * Example |
A counter circuit used for the BIST principles explanation. By setting specification parameters a BIST architecture is configured and a VHDL model of the counter with self-testing generated. |
| * Requirements |
Web browser with Sun Java plug-in (1.3 or higher) installed. |
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Select a module to start the applet :
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Built-In Self-Test Generator (c) 2002-2004 Institute of Informatics SAS
Contact: Tomáš Pikula, tomas.pikula@savba.sk |
